The present invention relates to a voltage controlled oscillator (VCO) for producing an output signal of a frequency corresponding to an input voltage applied thereto.
In a PLL (phase locked loop) frequency synthesizer, for example, it is required that the frequency of the output signal always be equal to a preset frequency. To this end, a voltage controlled oscillator (VCO) is usually employed.
A typical example of such a VCO is found in FIG. 1 and 3 in Japanese Patent Disclosure (KOKAI) No. 59-62215.
The output frequency of this prior art tends to vary when process parameters are varied during manufacturing. For example, the thickness of the oxide film can vary and capacitances of the capacitors in the oscillator can change. Variation of the gate lengths of transistors results in variation of the current values for charging the capacitors of the manufactured oscillators. Consequently, the process parameters inevitably vary when the circuit is IC fabricated. This would suggest that the oscillating frequencies of the fabricated oscillators are not invariable for the chips containing them, and that the production yield is reduced.
To solve this problem, Japanese Patent Disclosure (KOKAI) No. 59-28209 discloses an improved voltage controlled oscillator. A block diagram of the VCO shown in FIG. 2b of the KOKAI is shown in FIG. 1 of this specification.
In FIG. 1, first and second oscillators 21 and 22 have equal circuit arrangements and circuit patterns. These oscillators 21 and 22 each oscillate at a frequency corresponding to a: the sum of the voltages applied to voltage input terminals CONT and OFFSET. A reference voltage Vref is applied to the terminal CONT of the oscillator 21. The reference voltage Vref is obtained by dividing the power voltage by a resistive voltage divider, for example. A signal Nref of the reference frequency f.sub.ref is input to one of the input terminals of a first phase comparator 23. The output signal of the oscillator 21 is supplied to the other input terminal of the comparator 23. The output signal of the comparator 23 is applied through a first low-pass filter 24 to the input terminal OFFSET of the oscillator 21. These circuits 21, 23, and 24 cooperate to form a PLL.
The output signal of a second phase comparator 25 is applied, as an input voltage Vin, to the voltage input terminal CONT of oscillator 22 through a second low-pass filter 26. The signal output from the filter 24 is applied to the input terminal OFFSET of the oscillator 22. With such a connection, when a voltage equal to the reference voltage Vref is applied to the input terminal CONT of the oscillator 22, the oscillator 22 oscillates at a frequency equal to that of the first oscillator 21.
In this way, the FIG. 1 circuit is controlled, independant of varied process parameters, so as to oscillate at the reference frequency when the input voltage to the second oscillator 22 is equal to the reference voltage. Thus, even if the process parameters vary, the FIG. 1 circuit constantly oscillates at the fixed frequency f.sub.ref if the input voltage is set to the reference voltage.
However, if the input voltage Vin shifts to differ in value from the reference voltage Vref, the oscillating frequency is influenced by the change in the process parameters. The oscillating frequency of the FIG. 1 circuit is given by EQU f=.alpha.(Vin+Voffset) (1)
where .alpha. is a proportional coefficient.
In the above equation, when the process parameters are varied, the proportional coefficient changes. The change of the .alpha. changes the inclination of a characteristic curve of the output frequency to input voltage. This is well illustrated in FIG. 2 in which the abscissa represents the input voltage Vin, and the ordinate, the output frequency f.sub.ref. In FIG. 2, a rectilinear curve I represents an ideal characteristic. Rectilinear curves II and III are depicted with increased and decreased .alpha.. As seen from these curves, when Vref=Vin, the output frequency of the oscillator 22 is, by necessity, equal to the frequency f.sub.ref. If not so, the output frequencies will not be invariable under influence by the process parameter variation.
Further, in the FIG. 1 circuit, the process gain variation results in a change in a gain as defined by the ratio of change in the oscillating frequency to a change in the input voltage, and hence, a change in the loop gain of the PLL. The loop gain variation leads to variation in important characteristics such as damping and pull-in characteristics as well as in the response characteristic.